AVX10 instruction set opens a new chapter, GNU Assembler (Gas) initially supports

News on September 18th, Intel (Intel) recently released a highly anticipated technological innovation, namely the introduction of the new Advanced Performance Extensions (APX) instruction set and the new AVX10 instruction set. This news brought a new trend to the computer field.

Intel’s latest developments show that they are actively pushing the frontier of processor technology. According to reports, Intel will support the first version of AVX10, namely AVX10.1, starting with the sixth-generation Xeon "Granite Rapids" chips. Although this version only supports 512-bit vector instructions, it lays the foundation for improved computing performance and paves the way for future development

##At the same time, the open source community is also actively responding to this new technology. By mid-August, the first patch of AVX10.1 had successfully landed on GCC. 14, providing more possibilities for developers. And the exciting news is that GNU Assembler (Gas) has also initially supported AVX10.1, which will further promote the spread and application of AVX10 technology.

GNU assembler support for the AVX10 instruction set is provided by Jan of SUSE Completed by Beulich. He pointed out that since AVX10 is just a reshaping of some functions of AVX512, almost no new code was added during the implementation process. This will undoubtedly save developers a lot of time and energy.

The development of test cases is also crucial in addition to hardware support. To ensure the stability and accuracy of the AVX10 instruction set, we have designed new test cases. It is important to note that in order to support AVX10, we also need to add 256-bit and 128-bit tests to ensure that instructions with different bit widths can be fully tested and verified

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