In July this year, Intel released a new Advanced Performance Extensions instruction set (APX), and introduced the new AVX10 instruction set that will provide unified AVX-512 support for the P core and E core
This site Reminder, Intel will begin to support the first version of AVX10 (AVX10.1) on the sixth-generation Xeon "Granite Rapids" chip, but this version only supports 512bit vector instructions, not the new 256bit vector instructions
As of mid-August, the first version of the AVX10.1 patch has been released in GCC 14. In the process of popularizing AVX10, the latest development is that GNU Assembler (Gas) has initially supported AVX10.1
According to reports, the initial AVX10 GNU assembler support was completed by Jan Beulich of SUSE. Jan Beulich from SUSE said: Since this is just a reshape of some AVX512 features, little code needs to be added.
The main content is about new test cases. In order to be able to reuse some existing test cases, the starting symbols of several of the test cases need to be adjusted. Please note that 256-bit and 128-bit tests need to be added because these tests need to be executed immediately
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