CPU interrupts under Linux operating system

巴扎黑
Release: 2017-07-24 11:05:25
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Interrupt is actually a signal called IRQ (interrupt request) sent by hardware or software.

Interrupts allow devices such as keyboards, serial cards, parallel ports, etc. to indicate that they require the CPU.

Once the CPU receives an interrupt request, the CPU temporarily stops executing the running program and calls a specific program called an interrupt handler or interrupt service routine (interrupt service routine).

The interrupt service routine or interrupt handler can be found in the interrupt vector table, and this interrupt vector table is located at a fixed address in memory. After the interrupt is processed by the CPU, execution of the previously interrupted program will resume.

In fact, when the machine starts, the system has identified all devices and loaded the corresponding interrupt handlers into the interrupt table.

The following are two ways to request CPU attention:
1. Based on interrupts
2. Based on polling

All Linux operating systems are based on interrupt drivers.

When we press a key on the keyboard, the keyboard will tell the CPU that a key has been pressed. In this case, the voltage in the keyboard's IRQ line will change once, and this voltage change is a request from the device, which is equivalent to saying that the device has a request that needs to be processed.

/proc/interrupts file
On Linux machines, the /proc/interrupts file contains information about which interrupts are in use and how many times each processor has been interrupted.
# cat /proc/interrupts
CPU0 CPU1 CPU2 CPU3
0: 3710374484 0 0 0 IO-APIC-edge timer
1: 20 0 0 0 IO-APIC -edge i8042
6 ) 0 IO-APIC-edge rtc
9: 0 0 0 0 IO-APIC-level acpi
12: 240 0 0 0 IO-APIC-edge i8042
14: 11200026 0 0 0 IO-APIC-edge ide0
51: 61281 329 0 0 0 IO-APIC-level ioc0
59: 1 0 0 0 IO-APIC-level vmci
67: 19386473 0 0 0 IO-APIC-level eth0
75: 94595340 0 0 0 IO-APIC-level eth1
NMI :                                                                                                                                                                                                                      37371的4的狠的狠的东西。 The explanation is as follows:
● The first column indicates IRQ No.
● The second, third, and fourth columns indicate the number of times the corresponding CPU core was interrupted. In the above example, timer represents the interrupt name (which is the system clock). 3710374484 means that CPU0 was interrupted 3710374484 times. i8042 represents the keyboard controller that controls the keyboard and mouse.
● For interrupts like rtc (real time clock), the CPU will not be interrupted. Because RTC exists in electronic devices and is used to track time.
● NMI and LOC are drivers used by the system and cannot be accessed and configured by users.

The IRQ number determines the priority that needs to be processed by the CPU. The smaller the IRQ number means the higher the priority.

For example, if the CPU receives interrupts from the keyboard and the system clock at the same time, the CPU will first serve the system clock because its IRQ number is 0.
● IRQ0: System clock (cannot be changed)
● IRQ1: Keyboard controller (cannot be changed)
● IRQ3: Serial port controller of serial port 2 (if there is serial port 4, it also uses this interrupt)
● IRQ4: Serial port controller of serial port 1 (if there is serial port 3, it also uses this interrupt)

● IRQ5: Parallel ports 2 and 3 or sound card

● IRQ6: Floppy disk controller
● IRQ7: Parallel port 1. It is used with printers or if there is no printer, can be used with any parallel port.

For a CPU like a joystick (or game controller), it does not wait for the device to send an interrupt. Because the joystick is mainly used for games, the movement of the joystick must be very fast, so it is ideal to use polling to detect whether the device needs the attention of the CPU. The disadvantage of using the polling method is that the CPU is in a busy waiting state because the CPU will check the device multiple times. But it should be noted that in Linux, this way of handling signals is also essential.

Hard interrupt
The scenarios discussed above are all examples of hard interrupts. Hard interrupts are mainly divided into two categories:
1. Non-maskable interrupts (NMI): Just like the literal meaning of this interrupt type, this interrupt cannot be ignored or canceled by the CPU. . NMI is sent on a separate interrupt line and is usually used for critical hardware errors, such as memory errors, fan failures, temperature sensor failures, etc.
2. Maskable interrupts: These interrupts can be ignored or delayed by the CPU. This type of interrupt will be generated when the external pin of the cache controller is triggered, and the interrupt mask register will mask such interrupts. We can set a bit to 0 to disable the interrupt triggered on this pin.

Soft interrupt
These interrupts are generated when the CPU executes instructions (that is, when the process is running), because when executing instructions, the CPU (to be precise, it should be in the CPU operator) itself will generate an exception (the exception here can also be understood as a soft interrupt).

For example, dividing a number by 0 (of course this is impossible) will result in a divide-by-zero exception, causing the computer to cancel the calculation or display an error message.

The file /proc/stat contains some statistical information about the system kernel and some interrupt information.
# cat /proc/stat
cpu 17028082 5536753 5081493 1735530500 42592308 90006 479750 0
cpu0 5769176 1170683 1495750 403368354 394063 74 90006 284864 0
cpu1 3714389 1451937 1186134 444082258 1084780 0 64876 0
cpu2 3791544 1471013 1211868 443988514 1056981 0 64764 0
cpu3 3752971 1443119 1187740 444091373 1044172 0 65244 0
intr 417756956 --- Output Trun cated

The intr line shows the interrupts generated since the system started. number. The first column represents the number of all serviced interrupts. Each subsequent column represents the total number of interrupts for a specific interrupt.

SMP_AFFINITY
SMP refers to symmetric multiprocessor. The smp_affinity file is mainly used to determine which CPU core a specific IRQ is bound to. There is a smp_affinity file in the /proc/irq/IRQ_NUMBER/ directory. In this file, the CPU core represented is expressed in hexadecimal. For example, the interrupt number of the network card is:

grep eth0 /proc/interrupts
67: 23834931 0 0 0 IO-APIC-level eth0
                                       
cat /proc/irq/67/smp_affinity
00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000001

The decimal corresponding to the above hexadecimal is 1, which means that all interrupts related to the network card driver are CPU0 provides services.

We can bind the IRQ to the specified CPU core by manually changing the value in the smp_affinity file, or enable the irqbalance service to automatically bind the IRQ to the CPU core.


IRQ Balance
Irqbalance is a Linux utility, which is mainly used to distribute interrupt requests to the CPU core, helping to improve performance. Its purpose is to find a balance between power saving and performance optimization. You can use yum to install:
# rpm -qa | grep irqbalance
irqbalance-0.55-15.el5
# yum search irqbalance
# yum install irqbalance.x86_64

After starting the IRQBARANCE service, the distribution of interruption on the CPU is as follows:
#Cat /ProC /Interrupts
CPU1 CPU1 CPU3 ## 0: 950901695 0 0 0 IO-Edge Timer



# This 1: 13 0 0 0 0 IO-APIC-EDGE I8042
6: 96 10989 470 0 IO-APIC-EDGE FLOPPY ## 7: 0 0 0 0 IO-Edge Parport0
8: 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IO-APIC-edge rtc
9: 0 0 0 IO-APIC-level acpi
12: 109 1787 0 0 0 IO-APIC-edge i8042
15: 99 84813914 0 0 0 IO-APIC- edge ide1
51: 17371 0 46689970 0 IO-APIC-level ioc0
67: 1741 0 0 225409160 PCI-MSI eth0
83:       0               0         0 PCI-MSI vmci
NMI:                       0 0       0
LOC:                                                                                                                                                                                                                                                       0
MIS Irqbalance is very useful for systems containing multiple cores. Because usually interrupts are only serviced by the first CPU core.

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