Can Modern Hardware Really Store Bytes Without Affecting Neighboring Bytes?

The Strangeness of Modern Hardware: Byte Storage without System Disturbance

The Issue:

Stroustrup's claim that modern hardware cannot store objects smaller than a word clashes with the reality of modern processors, like x86, which routinely handle byte-sized storage and retrieval.

Stroustrup's Intended Meaning:

It's possible that Stroustrup was referring to a hypothetical ISA without a well-defined memory model, where byte storage could potentially overwrite neighboring bytes during a processor cycle.

Modern Hardware Implementation:

However, this is not the case with modern ISAs. Byte-store instructions are atomic and do not disturb surrounding bytes, whether implemented using:

• Internal RMW (Read-Modify-Write) cycles for each byte in a cache line (as in certain RISC designs)
• Efficient full-word commits to L1d cache

Exceptions and Considerations:

While modern CPUs prioritize byte-sized storage efficiency, there may be some nuances to consider:

• Cache Coherency:
  Although cache coherency protocols typically prevent issues with accessing neighboring bytes, hardware IO may require special handling.
• Older Processors:
  Early Alpha AXP processors did not have byte load/store instructions, demonstrating that this feature is not universally present in all architectures.

Implications for C :

Stroustrup's quote highlights the importance of:

• Well-defined memory models in hardware designs
• Compiler optimization techniques to avoid potential pitfalls with byte storage

Conclusion:

Modern x86 hardware and many other modern ISAs provide efficient and reliable byte storage, disproving Stroustrup's claim. However, it remains crucial for programmers and compiler designers to understand the implications of memory models to ensure data integrity and thread safety.

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