Interrupt priority is the hardware that divides interrupt sources into several levels; in order to enable the system to respond promptly and handle all interrupts that occur, the system divides the interrupt sources into different levels based on the importance and urgency of the interrupt event. There are several levels, called interrupt priorities. There are multiple interrupt sources in the microcomputer system. It is possible that two or more interrupt sources issue interrupt requests at the same time.
The operating environment of this tutorial: Windows 10 system, DELL G3 computer.
The hardware divides the interrupt source into several levels
In order to enable the system to respond in time and handle the occurrence For all interrupts, the system divides the interrupt sources into several levels according to the importance and urgency of the interrupt event, which are called interrupt priorities.
In actual systems, it is often encountered that multiple interrupt sources request interrupts at the same time. At this time, the CPU must determine which interrupt source to serve first and the order of service. The solution is to interrupt priority queuing, that is, according to the priority of the interrupt source request, arrange the priority of interrupt processing, that is, priority (Priority), also known as priority, and respond to the interrupt request with the highest priority first. In addition, when the CPU is processing an interrupt, it must be able to respond to another interrupt request with a higher priority and block interrupt requests of the same level or lower level, forming interrupt nesting.
Brief introduction
There are multiple interrupt sources in a microcomputer system, and it is possible that two or more interrupt sources issue interrupt requests at the same time. When multiple interrupt sources request interrupts at the same time, the CPU must first determine which interrupt source to serve, and must be able to identify the highest priority interrupt source and respond. When processing interrupts, the CPU must also be able to respond to higher-level interrupt requests and block interrupt requests of the same level or lower levels. This is the issue of interrupt priority.
In the interrupt system, the CPU generally processes each interrupt request separately according to the priority, that is, it determines an interrupt priority level for each interrupt source, and the system automatically queues them to ensure that interrupts with high priority levels are processed first. request, wait for the higher-level interrupt request to be processed, and then respond to the lower-level interrupt request. The purpose of identifying and prioritizing multiple interrupt sources is to determine the highest level interrupt source and form the interrupt service program entry address of the interrupt source so that the CPU can transfer control to the interrupt service program.
Generally refers to the following two meanings:
If 2 or more interrupt sources make interrupt requests at the same time, which interrupt source will the microprocessor respond to first? Which interrupt source will be responded to later;
If an interrupt source raises an interrupt request and the microprocessor responds and is executing its interrupt service routine, another interrupt source raises an interrupt request. Can subsequent interrupt sources interrupt the interrupt service routine of the previous interrupt source.
Response principle
The principle of responding to interrupts of different priorities is:
CPU responds first High-priority interrupt request;
If the priorities are the same, the CPU responds to the interrupt in front in query order;
In progress The interrupt process cannot be interrupted by a new interrupt request of the same level or a lower priority;
The ongoing low-priority interrupt process can be interrupted by a high-priority interrupt request.
The CPU interrupt response process is as follows:
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