The characteristics are: 1. Compared with the conventional RS flip-flop, the synchronous RS flip-flop has one more terminal, called the clock signal input terminal branch structure; 2. When the input terminal state changes, there is only the clock signal at the same time The status of the synchronous RS flip-flop will only change when there is a square wave signal at the input end.
The operating environment of this tutorial: Windows 7 system, Dell G3 computer.
1. Synchronous RS flip-flop: so that the synchronous RS flip-flop changes the output state according to the clock pulse timing.
2. Basic RS trigger: Basic RS trigger has the functions of set, reset and hold (memory). Triggers are often used to strengthen data integrity constraints and business rules; RS triggers are generally Used to resist switch jitter.
Principle
1. Synchronous RS flip-flop: When the state of the input terminal (S, R) changes, and at the same time, only the clock signal input terminal has a square wave signal, The status of the RS trigger will not change until it is synchronized. That is, the flip-flop will change the output state according to the input state only on the falling edge of the clock pulse, and vice versa.
2. Basic RS flip-flop: When different logic levels are added to the two input terminals of the flip-flop, its two output terminals Q and Q have two complementary stable states. Generally, the Q terminal of the flip-flop is stipulated The state is the state of the flip-flop. It is usually said that the flip-flop is in a certain state, which actually refers to the state of its Q terminal.
Structure
1. Synchronous RS flip-flop: Compared with the conventional RS flip-flop, there is one more synchronous RS flip-flop. The terminal, called the clock signal input terminal branch structure, allows the synchronous RS flip-flop to change the output state according to the clock pulse timing.
2. Basic RS flip-flop: The basic RS flip-flop is composed of two NAND gates, which are closed in a positive feedback mode. It can also be made of two NOR gates, which are closed in a positive feedback mode.
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